p 13.


add instruction


2-3 clk cycles av.



		r.1 ---+-- xor ---- s ---- rx ---+
	        |      |   |        |		 |
           +----+      |   |	    |		 |
	   |           |   |	    |		 |
	   |	r.2 -+-----+	    |		 |
	   |	|    | |	    |		 |
	   |	|    | |	    |		 |
	   +-------------------------------------+
	        |    | |            |
	        |    | |            +----+
	        |    | +-                |
                |    +-- and --- lsft -- s - rx2 --+
		|	                 |	   |
                +---+------------------------------+
	 	    |			 |
		    |			 |
		    |			 |
   IC6	---------------------------------+
		    |
		    |
		    +---- zero detect ----- cancel clock wait



repeats until r.2 is zero

            